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[VHDL-FPGA-Verilogusb1.1_Verilog

Description: usb1.1的设备控制器IP核,是用verilog硬件描述语言写的-USB1.1 IP core for device control, written with hardware describing language of Verilog.
Platform: | Size: 131072 | Author: 李恒 | Hits:

[Communication基于USB-ATA接口的海量存储器的设计与实现

Description: 介绍了一种基于通用可编程接口的通用串行总线-高级技术配件解决方案,将普通硬盘转化为Usb Mass Storage.-introduces a general programmable interface based on the Universal Serial Bus-senior technical accessories solution that will drive into ordinary Usb Mass Storage.
Platform: | Size: 86016 | Author: 蔡明 | Hits:

[VHDL-FPGA-Verilogusb_funct

Description: usb1.0的核,有详细的usb核的设计源码,用verilog语言编写,同时附有相关的设计文档,质量不错-usb1.0 nuclear, nuclear usb detailed design source, using Verilog language, along with documents related to the design, quality good
Platform: | Size: 214016 | Author: | Hits:

[Com Portusb_ctr

Description: usb的verilog 代码。对理解usb的原理有很大帮助,并可以在nc环境下仿真。-usb the Verilog code. Usb to understand the principle is very helpful, and to be nc simulation environment.
Platform: | Size: 53248 | Author: hongbo | Hits:

[USB developUSB2_chip

Description: USB2.0 chip的一部分verilog源码。opencore上下的,还比较好用:)-USB2.0 chip part of Verilog source. Opencore ish, but also better quality :)
Platform: | Size: 35840 | Author: 戴鹏 | Hits:

[USB developUsb_RTL(VHDL_Verilog)

Description: USBRTL电路的VHDL和Verilog代码-USBRTL Circuit VHDL and Verilog code
Platform: | Size: 268288 | Author: 戴鹏 | Hits:

[VHDL-FPGA-Verilogusb1.1phy

Description: USB 1.1 PHY的代码,verilog语言 USB 1.1 PHY的代码,verilog语言-USB 1.1 PHY code, verilog language USB 1.1 PHY code, verilog language
Platform: | Size: 8192 | Author: william | Hits:

[VHDL-FPGA-VerilogUSB2.0IP_core_Verilog

Description: 完整的用VERILOG语言开发的USB2.0 IP核源代码,包括文档、仿真文件-complete with verilog language development USB2.0 IP source code, including documentation, Simulation documents
Platform: | Size: 206848 | Author: 张清平 | Hits:

[ELanguageusb_funct

Description: USB接口的VHDL源码,支持Verilog HDL程序-USB VHDL source code, supports Verilog HDL procedures
Platform: | Size: 230400 | Author: 王森 | Hits:

[VHDL-FPGA-Verilogusb_phy

Description: umti协议中的usb1.1的verilog原文件,可公实现usb2.0做参考-umti the agreement usb1.1 verilog the original documents, the public can refer to achieve usb2.0
Platform: | Size: 10240 | Author: liuzefu | Hits:

[USB developusb

Description: 实现了USB接口。介绍了如何使用VERILOG语言实现USB的程序设计。-Realize the USB interface. Introduce how to use the Verilog language programming USB realize.
Platform: | Size: 140288 | Author: xiexiao | Hits:

[VHDL-FPGA-Verilog8051core-Verilog

Description: 一个Verilog写的8051 MCU实现-Write a Verilog realization of the 8051 MCU
Platform: | Size: 55296 | Author: chen | Hits:

[ApplicationsAsynchronous_slavefifo_wr

Description: usb-cy7c68013异步写传输代码verilog-usb-cy7c68013 asynchronous transfer write verilog code
Platform: | Size: 2048 | Author: 罗玉明 | Hits:

[VHDL-FPGA-VerilogUSB

Description: USB接口的测试程序,Verilog语言编写 -USB
Platform: | Size: 140288 | Author: wzk | Hits:

[source in ebookUSBverilog

Description: verilog USB程序,经过实践调试,并且都能成功实现-verilog USB procedures, debugging practice, and can be successfully achieved
Platform: | Size: 140288 | Author: | Hits:

[VHDL-FPGA-VerilogUSB

Description: Verilog实现的USB程序,用ISE打开工程文件即可-Verilog implementation USB program, open the project file with the ISE can be
Platform: | Size: 140288 | Author: Roy | Hits:

[USB developpci-verilog

Description: USB及PCI总线设计的一些源代码(经测试)-USB and PCI bus design some of the source code
Platform: | Size: 431104 | Author: tom | Hits:

[Communicationverilog

Description: source code for USB 2.0 fonction core in verilog
Platform: | Size: 57344 | Author: chaitanya | Hits:

[VHDL-FPGA-VerilogUSB_Interface

Description: verilog USB USB的slave fifo的控制-verilog USB
Platform: | Size: 2048 | Author: xuxf | Hits:

[VHDL-FPGA-Verilogverilog-usb--protel-design

Description: 基于FPGA的usb2.0 ip核设计,所用的语言是verilog-FPGA-based usb2.0 ip core design, the language used is the verilog
Platform: | Size: 53248 | Author: 唐明桂 | Hits:
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